Vertical and Horizontal Transmission of Cell Fusing Agent Virus in Aedes aegypti

Cell fusing agent virus (CFAV) is an insect-specific flavivirus (ISF) found in Aedes aegypti mosquitoes. ISFs have demonstrated the ability to modulate the infection or transmission of arboviruses such as dengue, West Nile, and Zika viruses. It is thought that vertical transmission is the main route for ISF maintenance in nature. This has been observed with CFAV, but there is evidence of horizontal and venereal transmission in other ISFs. Understanding the route of transmission can inform strategies to spread ISFs to vector populations as a method of controlling pathogenic arboviruses. We crossed individually reared male and female mosquitoes from both a naturally occurring CFAV-positive Ae. aegypti colony and its negative counterpart to provide information on maternal, paternal, and horizontal transmission. RT-PCR was used to detect CFAV in individual female pupal exuviae and was 89% sensitive, but only 42% in male pupal exuviae. This is a possible way to screen individuals for infection without destroying the adults. Female-to-male horizontal transmission was not observed during this study. However, there was a 31% transmission rate from mating pairs of CFAV-positive males to negative female mosquitoes. Maternal vertical transmission was observed with a filial infection rate of 93%. The rate of paternal transmission was 85% when the female remained negative, 61% when the female acquired CFAV horizontally, and 76% overall. Maternal and paternal transmission of CFAV could allow the introduction of this virus into wild Ae. aegypti populations through male or female mosquito releases, and thus provides a potential strategy for ISF-derived arbovirus control

Platform Dependent Verification: On Engineering Verification Tools for 21st Century

The paper overviews recent developments in platform-dependent explicit-state LTL model checking.Comment: In Proceedings PDMC 2011, arXiv:1111.006

Active memory controller

Inability to hide main memory latency has been increasingly limiting the performance of modern processors. The problem is worse in large-scale shared memory systems, where remote memory latencies are hundreds, and soon thousands, of processor cycles. To mitigate this problem, we propose an intelligent memory and cache coherence controller (AMC) that can execute Active Memory Operations (AMOs). AMOs are select operations sent to and executed on the home memory controller of data. AMOs can eliminate a significant number of coherence messages, minimize intranode and internode memory traffic, and create opportunities for parallelism. Our implementation of AMOs is cache-coherent and requires no changes to the processor core or DRAM chips. In this paper, we present the microarchitecture design of AMC, and the programming model of AMOs. We compare AMOs\u27 performance to that of several other memory architectures on a variety of scientific and commercial benchmarks. Through simulation, we show that AMOs offer dramatic performance improvements for an important set of data-intensive operations, e.g., up to 50x faster barriers, 12x faster spinlocks, 8.5x-15x faster stream/array operations, and 3x faster database queries. We also present an analytical model that can predict the performance benefits of using AMOs with decent accuracy. The silicon cost required to support AMOs is less than 1% of the die area of a typical high performance processor, based on a standard cell implementation

Getting to Know You: Towards a Capability Model for Java

Developing software from reusable libraries lets developers face a security dilemma: Either be efficient and reuse libraries as they are or inspect them, know about their resource usage, but possibly miss deadlines as reviews are a time consuming process. In this paper, we propose a novel capability inference mechanism for libraries written in Java. It uses a coarse-grained capability model for system resources that can be presented to developers. We found that the capability inference agrees by 86.81% on expectations towards capabilities that can be derived from project documentation. Moreover, our approach can find capabilities that cannot be discovered using project documentation. It is thus a helpful tool for developers mitigating the aforementioned dilemma

Improving Reactivity to I/O Events in Multithreaded Environments Using a Uniform, Scheduler-Centric API

Reactivity to I/O events is a crucial factor for the performance of modern multithreaded distributed systems. In our scheduler-centric approach, an application detects I/O events by requesting a service from a detection server, through a simple, uniform API. We show that a good choice for this detection server is the thread scheduler. This approach simplifies application programming, significantly improves performance, and provides a much tighter control on reactivity